The trend toward smaller sizes, lighter weights and higher capabilities in electrical equipment requires to increase the packaging density of electronic parts on a printed circuit board. This invites a shift in the dominant semiconductor mounting process from pin insertion to surface mounting.
Of the surface mount systems, the flip-chip mounting is by gang bonding a semiconductor chip to a conductor pattern surface of a circuit board via a plurality of bumps. Packaging is completed by filling the gap between the organic board and the semiconductor chip and gaps between solder bumps with an underfill material and curing the underfill material. As one application of this mount system, it is disclosed in JP-A 2007-42904 that a semiconductor chip with face down is flip-chip mounted to a circuit board having multilayer interconnections formed therein (known as interposer).
A multilayer semiconductor package adopting the TSV structure has emerged as the joining technology that replaces the prior art wire bonding technology. Lead-free bumps have changed to copper bumps.
An underfill material is used in the multilayer semiconductor package. By means of a dispenser, the underfill material is dispensed so as to infiltrate between the circuit board and the semiconductor chip by a capillary phenomenon. As the semiconductor chip assembly becomes multilayered, fillets are exaggerated, particularly at the dispenser side. There may arise the problems that the underfill spreads out of the circuit board, and in the case of a semiconductor chip laminate of wire bonding type, the underfill infiltrates through pads.
To avoid these problems, the substrate is provided with a dam for preventing the underfill from spreading. Prior art dam materials are less adherent to the underfill. Stripping can occur at the interface between the dam material and the underfill material during solder reflow or thermal cycling. A further problem is that cracks form in the package to cause breakage to the semiconductor chip surrounding region.